本論文主要在於設計與研究微波及毫米波相位陣列收發積體電路。第一部份為槽孔天線及振盪器之設計。由於操作頻率提高，其基板所造成的損耗就會越大，藉由將天線與振盪器整合於同一晶片，使振盪器與天線相連接降低訊號損失，可增加天線的有效輻射強度。就整體而言，可降低損耗並縮小面積。第二部份為線性化放大器之設計。電晶體非線性效應主要來自三階非線性轉導(gm3)及閘極-源極電容(Cgs)，藉由基底至源極的偏壓大小改變三階非線性轉導的位置，將兩顆具有正負三階非線性轉導峰值的電晶體並聯，消除三階非線性轉導。應用於放大器設計，其三階截斷點(IIP3)改善約6 dB，進而降低訊號失真並改善通訊品質。最後是相位陣列接收機之設計，其電路由放大器與正交調變器所構成，並藉由調整正交調變器的偏壓改變輸出訊號的相位，以達到相位陣列之需求。而此相位陣列接收機的架構易於拓展，其可利用功率結合器(Wilkinson combiner)將電路設計為4×1或8×1的相位陣列接收機。 In this thesis, the microwave and millimeter-wave (MMW) phase array transceiver integrated circuits are presented. First, the design of a slot antenna and a voltage controlled oscillator are proposed using a MMIC technology. The substrate loss is more and more high when the operation frequency is high. To enhance the radiation efficiency of the MMW transmitter, an antenna can be further integrated in the MMIC chip, and also the chip size and the loss are both reduced. Second, a 24-GHz amplifier by using a third-order transconductance (gm3) cancellation technique is presented. The linearity effect of the CMOS device is generally degraded by the gm3 and the gate-to-source capacitor. The characteristic of the gm3 can be adjusted by appling a dc bias to the bulk of the device. The cancellation of gm3 can be achived combining a negative peak gm3 transistor in parallel with a positive peak gm3 transistor. The measured input third-order intercept point (IIP3) is improved over 6 dB. Therefore, the distortion and the communication quality can be both improved. Finally, a phase array receiver, including a low noise amplifier and an IQ modulator, is proposed for the MMW applications. The phase can be controlled by adjusting the bias of the IQ modulator. The topology of the 2×1 receiver can be further extended to 4×1 or 8×1 phase array receiver with a Wilkinson power combiner.
