Institute of Electrical and Electronics Engineers Inc.;IEEE
摘要:
摘要： This brief presents an efficient very-large-scale integration architecture design for convolutive blind source separation (CBSS). The CBSS separation network derived from the information maximization (Infomax) approach is adopted. The proposed CBSS chip design consists mainly of Infomax filtering modules and scaling factor computation modules. In an Infomax filtering module, input samples are filtered by an Infomax filter with the weights updated by Infomax-driven stochastic learning rules. As for the scaling factor computation module, all operations including logistic sigmoid are integrated and implemented by the circuit design based on a piecewise-linear approximation scheme. The proposed prototype chip is implemented via a semi-custom design using 90-nm CMOS technology on a die size of approximately 0.54 × 0.54 mm 2 . 其他題名： TCSII 出版者： IEEE 出版日期： 2016-02 出處： IEEE transactions on circuits and systems. II, Express briefs, 2016-02, Vol.63 (2), p.196-200 資源來源： IEEE Electronic Library (IEL) 識別號： ISSN: 1549-7747 識別號： EISSN: 1558-3791 識別號： DOI: 10.1109/TCSII.2015.2468928 識別號： CODEN: ICSPE5
