本論文採用 UMC 0.18 μm 1P6M CMOS-MEMS 標準製程，設計單軸磁力計與單軸陀螺儀整合之共享微結構晶片，並以分階段下線方式進行設計與驗證。元件利用結構內部金屬走線通入交流電流，在外加磁場作用下產生勞倫茲力作為共享驅動源，同時該金屬走線亦作為磁力計之感測通道。 第一階段晶片整合自研傳輸閘多工器（Transmission Gate Multiplexer， TG MUX）與 TSRI MEMS 讀取電路 IP。量測結果顯示，TG MUX 具有良好的高阻抗隔離特性，可使磁力計與陀螺儀共用同一組 MEMS 讀取電路 IP，相較於各自配置讀取電路之架構，可減少約 40%～45% 讀取電路面積。在磁力計模式下，於 34.5 mA 峰值驅動電流及實測共振頻率 2900 Hz 操作條件下，利用機械共振效應提升輸出訊號，其本質靈敏度可達 10.72 V/T。 陀螺儀模式量測結果顯示，元件因殘留應力產生約 2.199 μm 的出平面翹曲，造成電極有效重疊面積減少，進而降低感測靈敏度。此外，在常壓環境下，空氣阻尼降低感測模態的品質因子（Q 值），使科氏力所產生的感測訊號難以與背景雜訊區分，因此未能完成角速度量測。 第二階段晶片進一步實現系統單晶片（SoC）架構，以自研單端連續時間電荷放大器（Continuous-Time Charge Amplifier， CTCA）取代第一階段所採用之 TSRI MEMS 讀取電路，作為 MEMS 感測器之前端讀取電路，並整合 10-bit SAR ADC IP。其中，CTCA 所採用之 OTA 具有 74.03ⅆB 的直流增益，輸入訊噪比（SNR）約為 60ⅆB。目前第二階段晶片已完成版圖設計並送交下線，後續將進行晶片製作與量測驗證。;This thesis presents a shared microstructure chip integrating a single-axis magnetometer and a single-axis gyroscope based on the UMC 0.18 μm 1P6M CMOS-MEMS standard process. A two-stage tape-out strategy was adopted for design implementation and experimental verification. The device employs an AC current flowing through embedded metal routing to generate the Lorentz force under an external magnetic field as the shared driving mechanism. The first-stage chip integrates a self-designed Transmission Gate Multiplexer (TG MUX) with the TSRI MEMS readout circuit IP. Measurement results demonstrate that the proposed TG MUX provides excellent high-impedance isolation， enabling the magnetometer and gyroscope to share a single MEMS readout circuit IP. Compared with the conventional architecture requiring separate readout circuits， the proposed design reduces the readout circuit area by approximately 40%–45%. In the magnetometer mode， under a peak driving current of 34.5 mA and the measured resonant frequency of 2900 Hz， an intrinsic sensitivity of 10.72 V/T was achieved. Measurement results of the gyroscope mode indicate that residual stress causes an out-of-plane deformation of approximately 2.199 μm， reducing the effective overlap area of the sensing electrodes and consequently degrading the sensing sensitivity. In addition， air damping under atmospheric pressure lowers the quality factor (Q-factor) of the sensing mode， making the Coriolis-force-induced signal difficult to distinguish from background noise. As a result， angular velocity measurement could not be achieved. The second-stage chip further realizes a System-on-Chip (SoC) architecture by replacing the TSRI MEMS readout circuit with a self-designed Continuous-Time Charge Amplifier (CTCA) as the front-end readout circuit for the MEMS sensor and integrating a 10-bit successive approximation register (SAR) ADC IP. The operational transconductance amplifier (OTA) in the CTCA achieves a DC gain of 74.03ⅆB and an input signal-to-noise ratio (SNR) of approximately 60ⅆB. The second-stage chip has completed layout implementation and has been submitted for fabrication. Experimental validation will follow fabrication.
