本研究致力於開發高品質六方氮化硼 (h-BN) 薄膜的低壓化學氣相沉積 (LPCVD) 製程，並探討其作為異質結構介面工程材料，在提升二維過渡金屬二硫 屬化物如二硫化鉬， MoS2 元件效能上的應用潛力。實驗中透過精確調控磁控濺鍍 氮化矽 (Si3N4) 基板之光學厚度，利用干涉增強拉曼散射 (IERS) 效應，有效解決 了 h-BN 在傳統介電基板上特徵訊號微弱的鑑定難題。研究證實，透過沉積溫度 提升至 1300°C 可顯著優化 h-BN 的結晶品質，經穿透式電子顯微鏡 (TEM) 與 光電子能譜 (XPS) 量測，薄膜展現了高度有序的層狀排列（層間距 0.34 nm）及 近乎理想的 1:1 B:N 化學計量比。 在異質整合方面，本研究深入分析了 h-BN 緩衝層厚度與介面狀態對 MoS2 生長品質之影響，確立了維持凡得瓦介面對於提升二硫化鉬光致發光 (PL) 效率與 結晶品質的重要性，並成功比較了減薄策略對介面缺陷控制的效能差異。此外，透 過製作背向閘極場效電晶體 (FET)，證實 h-BN 緩衝層能有效降低 Si3N4 基板的 缺陷密度，解決了元件常見的遲滯 (Hysteresis) 問題，使遲滯電壓 (ΔVth) 大幅降 至 3.5 V。最佳化後的 MoS2/h-BN/Si3N4 元件展現了優異的傳輸效能，最大導通電 流 (Ion) 較對照組提升了一個數量級。本研究建立之 h-BN 生長製程與介面整合技 術，不僅驗證了材料本身的應用潛力，更為未來高性能二維電子與光電元件的開發 提供了重要的技術依據。;This study focuses on the development of a low-pressure chemical vapor deposition (LPCVD) process for high-quality hexagonal boron nitride (h-BN) thin films and explores their potential as interface engineering materials in heterostructures to enhance the performance of two-dimensional transition metal dichalcogenide (e.g.， MoS2) devices. By precisely tuning the optical thickness of magnetron-sputtered silicon nitride (Si3N4) substrates， the interference-enhanced Raman scattering (IERS) effect was utilized to effectively address the challenge of identifying weak h-BN characteristic signals on conventional dielectric substrates. The study demonstrates that elevating the deposition temperature to 1300°C significantly optimizes the crystalline quality of h-BN. Measurements via transmission electron microscopy (TEM) and X-ray photoelectron spectroscopy (XPS) revealed a highly ordered layered arrangement (interlayer spacing of 0.34 nm) and a near-ideal 1:1 B:N stoichiometric ratio. Regarding heterogeneous integration， this research conducted an in-depth analysis of the impact of h-BN buffer layer thickness and interface states on the growth quality of MoS2. The results establish the critical importance of maintaining a pristine van der Waals interface for improving the photoluminescence (PL) efficiency and crystalline quality of MoS2， while comparing the efficacy of thinning strategies in controlling interface defects. Furthermore， through the fabrication of back-gated field-effect transistors (FETs)， it was confirmed that the h-BN buffer layer effectively screens reduces the interface defect density from the Si3N4 substrate， mitigating common device hysteresis issues and reducing the hysteresis voltage (ΔVth) to 7.8 V. The optimized MoS2/ h-BN / Si3N4 devices exhibited superior transport performance， with a maximum on-current (Ion) enhanced by an order of magnitude compared to the control group. The h-BN growth process and interface integration technology established in this study not only validate the material′s application potential but also provide a critical technical basis for the future development of high-performance 2D electronic and optoelectronic devices.
