綜合而言，本架構在偵測效能、硬體複雜度與標準相容性之間取得有效平衡，適用於低訊雜比衛星接收機之實體層標頭偵測，並可作為未來具類似信令結構之衛星通訊系統的低延遲同步與信令解析核心。;DVB-S2/S2X is a key physical-layer transmission standard for modern satellite communication systems. Through adaptive coding and modulation (ACM) together with physical-layer signaling， the modulation and coding mode can be switched dynamically according to channel conditions. Compared with DVB-S2， however， DVB-S2X employs a more complex Physical Layer Signaling (PLS) structure and may repeatedly transmit PLS fields in Super-Frame configurations. Efficient frame synchronization and signaling detection under low signal-to-noise ratio (SNR) conditions therefore becomes a key design challenge.
This dissertation proposes an efficient joint frame synchronization and signaling detection architecture for DVB-S2/S2X systems. The proposed method reformulates the PLS signal generation process as a phase-decoupled model and exploits the Walsh--Hadamard structure embedded in the PLS code. By applying the Fast Walsh--Hadamard Transform (FWHT)， the detector jointly estimates the frame position and decodes the PLS code with performance equivalent to the maximum likelihood (ML) criterion， while significantly reducing the computational complexity compared with the direct method， which correlates the received signal against all possible PLS codes. The architecture supports both Legacy DVB-S2 and DVB-S2X modes within a unified hardware framework.
Simulation results show that， within the target operating region where the normalized residual carrier frequency offset is below 0.01， the proposed Joint Maximum Likelihood (JML) detector offers a clear performance advantage over conventional non-coherent methods such as NCPDI， CLD， DPDI， and D-GPDI. At a false acquisition error rate (FAER) of 1E-4， it achieves approximately 6 dB of SNR gain over traditional differential detection. In terms of hardware complexity， the proposed architecture requires no multipliers and uses only 729 adders and 932 registers， whereas the direct method requires 16，128 adders and 16，384 registers for joint frame synchronization and PLS decoding， corresponding to reductions of approximately 22 times and 18 times in adders and registers， respectively.
Overall， the proposed architecture achieves a practical balance among detection performance， hardware efficiency， and standard compatibility. It provides a low-complexity， low-latency solution for physical-layer header detection in DVB-S2/S2X satellite receivers and can serve as a reference architecture for future satellite communication systems with similar structured signaling fields.
