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    請使用永久網址來引用或連結此文件: https://ir.lib.ncu.edu.tw/handle/987654321/111231


    題名: 使用100-nm GaAs pHEMT 與120-nm GaN HEMT 製程之Q 頻段功率放大器;Q-Band Power Amplifiers in 100-nm GaAs pHEMT and 120-nm GaN HEMT Technologies
    作者: 饒竣傑;JAO, CHUN-CHIEH
    貢獻者: 電機工程學系
    關鍵詞: 功率放大器;砷化鎵;氮化鎵;Q頻段;PA;GaAs;GaN;Q-band
    日期: 2026-08-31
    上傳時間: 2026-10-20 17:06:53 (UTC+8)
    出版者: 國立中央大學
    摘要: 本論文探討應用於Q頻段之毫米波功率放大器設計,分別採用 WIN 100-nm GaAs pHEMT PP10-20 與 WIN 120-nm GaN HEMT NP12-01 製程,實現兩款操作於 40 GHz 之單級功率放大器,並針對匹配網路設計、穩定化方法,以及模擬與量測結果進行分析與探討。

    第二章採用 WIN 100-nm GaAs pHEMT PP10-20 製程,設計一款操作於 40 GHz 之單級功率放大器。設計流程參考先前下線電路之量測結果,並透過寄生效應補償進行重新模擬與設計。電路匹配採用集總元件(lumped element, LE)之匹配概念,以降低匹配網路所佔用之晶片面積。量測結果顯示,於 40 GHz 下可達到 5.6 dB 增益、24.3 dBm 之 OP1dB,並於 OP1dB 時具有 34.5 % 之功率附加效率(power-added efficiency, PAE)。

    第三章採用 WIN 120-nm GaN HEMT NP12-01 製程,設計一款操作於 40 GHz 之單級功率放大器。電路設計使用部分集總元件之匹配概念,以縮小匹配網路面積。量測結果顯示,於 40 GHz 下可達到 4.8 dB 增益、21.4 dBm 之 OP1dB,並於 OP1dB 時具有 14.7 % 之功率附加效率。;This thesis investigates the design of Q-band millimeter-wave power amplifiers. Two single-stage power amplifiers operating at 40 GHz were implemented using the WIN 100-nm GaAs pHEMT PP10-20 and WIN 120-nm GaN HEMT NP12-01 processes, respectively. The matching network design, stabilization techniques, and the corresponding simulation and measurement results are presented and discussed.

    In Chapter 2, a 40-GHz single-stage power amplifier was designed using the WIN 100-nm GaAs pHEMT PP10-20 process. The design was based on the measured results of a previously fabricated circuit, followed by redesign and re-simulation with parasitic-effect compensation. A lumped-element (LE) matching approach was adopted to reduce the chip area occupied by the matching network. The measured results demonstrate a small-signal gain of 5.6 dB, an output 1-dB compression point(OP1dB) of 24.3 dBm, and a power-added efficiency (PAE) of 34.5 % at OP1dB.

    In Chapter 3, a 40-GHz single-stage power amplifier was designed using the WIN 120-nm GaN HEMT NP12-01 process. A partially lumped-element matching approach was employed to further reduce the chip area occupied by the matching network. The measured results demonstrate a small-signal gain of 4.8 dB, an OP1dB of 21.4 dBm, and a PAE of 14.7 % at OP1dB.
    顯示於類別:[電機工程研究所] 博碩士論文

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