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    請使用永久網址來引用或連結此文件: https://ir.lib.ncu.edu.tw/handle/987654321/111244


    題名: 應用於衛星通訊與感測之 Ku/U/W 頻段低雜訊放大器;Ku-, U-, and W-Band Low-Noise Amplifiers for Satellite Communications and Sensing
    作者: 曾敏紘;TSENG, MIN-HUNG
    貢獻者: 電機工程學系
    關鍵詞: 低雜訊放大器;Ku 頻段;U 頻段;W 頻段;砷化鎵;氮化鎵;LNA;Ku-band;U-band;W-band;GaAs;GaN
    日期: 2026-08-31
    上傳時間: 2026-10-20 17:08:45 (UTC+8)
    出版者: 國立中央大學
    摘要: 本論文為使用 WIN 120-nm GaN HEMT 製程,設計應用於衛星通訊與感測之 Ku 頻段低雜訊放大器,以及使用 WIN 100-nm GaAs pHEMT 製程來實現的 U 和 W 頻段低雜訊放大器。

    現今研究發展趨勢向微波與毫米波頻段遷移,並介紹 Ku、U、W 頻段。接著說明低雜訊放大器的重要性與設計上的挑戰。

    第一個電路使用 WIN 120-nm GaN HEMT NP12-01 製程,設計應用於 Ku 頻段之低雜訊放大器。採用了源極退化(source degeneration)架構。在 15 GHz 的頻率下,實現 7.6 dB 的增益,以及 3.1 dB 的雜訊指數。小訊號模擬與量測結果大致相符,雜訊指數則有後續改善的空間。

    第二個電路使用 WIN 100-nm GaAs pHEMT PP10-20 製程,設計應用於 U 頻段之低雜訊放大器。採用了共源共閘(cascode)架構。經由先前電路偵錯,修正電晶體模型,再進行電路設計。在 48 GHz 的頻率下,實現 19.3 dB 的增益,以及 2.4 dB 的雜訊指數。增益、雜訊指數較佳但反射損耗仍需要優化改善。

    第三個電路使用 WIN 100-nm GaAs pHEMT PP10-20 製程,設計應用於 W 頻段之低雜訊放大器。採用了共源共閘(cascode)架構。經由先前電路偵錯,修正電晶體模型,再進行電路設計。在 94 GHz 的頻率下,實現 13.7 dB 的增益,以及 3.9 dB 的雜訊指數。增益、雜訊指數較佳,但線性度不足的問題需要解決。;This thesis presents the design of a Ku-band low-noise amplifier for satellite communication and sensing using the WIN 120-nm GaN HEMT process, and U-band and W-band low-noise amplifiers implemented using the WIN 100-nm GaAs pHEMT process.

    Current research trends are shifting towards microwave and millimeter-wave frequency bands, and the Ku-, U-, and W-band are introduced. The importance of low-noise amplifiers and their design challenges are then explained.

    The first circuit, designed using a WIN 120-nm GaN HEMT NP12-01 process, is a low-noise amplifier applied to the Ku-band. It employs a source degradation architecture. At 15 GHz, it achieves a gain of 7.6 dB and a noise figure of 3.1 dB. Small-signal simulation and measurement results are largely in agreement, but there is room for further improvement in the noise figure.

    The second circuit, designed using a WIN 100-nm GaAs pHEMT PP10-20 process, is a low-noise amplifier applied to the U-band. It employs a cascode architecture. Following debugging of the previous circuit and correction of the transistor model, the circuit design was then carried out. At 48 GHz, it achieves a gain of 19.3 dB and a noise figure of 2.4 dB. While the gain and noise figure are good, the reflection loss still needs optimization and improvement.

    The third circuit, designed using a WIN 100-nm GaAs pHEMT PP10-20 process, is a low-noise amplifier applied to the W-band. It employs a cascode architecture. Following debugging of the previous circuit and correction of the transistor model, the circuit design was then carried out. At 94 GHz, it achieves a gain of 13.7 dB and a noise figure of 3.9 dB. The gain and noise figure are good, but the problem of insufficient linearity needs to be solved.
    顯示於類別:[電機工程研究所] 博碩士論文

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