本論文研究探討以選擇性氧化矽鍺形成鍺量子點與奈米線之關鍵機制，進而提出平面氧化高濃度矽鍺的模型。藉由文獻以及實驗結果的輔助來證實此氧化模型的準確性，並且以此模型來估算形成更高濃度矽鍺層的氧化時間。以此平面氧化高濃度矽鍺模型作為出發點，進而可推導出平面及兩側壁三方向氧化高濃度矽鍺模型。利用電子束微影（electron beam lithography，EBL）以及氮化矽間隙壁的製程，我們實際製作出寬度26 ~ 116 nm的矽鍺奈米線，也觀察到由線轉變成點的過程與鍺濃度及細線的幾何尺寸有其相依關係。另外，由氧化矽鍺線實驗中觀察到，矽鍺細線氧化前的寬度、長度與氧化後所形成量子點位置及大小的關係。也從氧化矽鍺細線的實驗中觀察到高濃度矽鍺經長時間氧化後之情形以及說明矽鍺薄膜氧化時鍺鑽入氮化矽之機制。藉由以上的實驗說明高濃度矽鍺氧化機制，以利後續製作鍺奈米線電晶體以及鍺量子點之應用元件。This thesis investigates the key mechanism of forming Ge-QDs or nanowire by the selective oxidaizing SiGe, then brings up the planar oxidation high concentration SiGe model. Through experimental data for assisting the accuracy of this model, we furthermore estimated the required oxidation time for forming higher concentration SiGe layer. Then we derived a three-directional oxidation model for forming high concentration SiGe. In fact, we have made SiGe nanowire width from 26 to 116 nm by EBL and Si3N4 spacer, also observed the transition process of transforming a SiGe wire into Ge-QDs, which are highly dependent on Ge concentration or wire’s geometry. The proposed oxidation model is applicable for fabricating Ge nanowire MOSFET and Ge-QDs application devices in the future.
