改善高速光連接系統訊號完整性之被動等化器研製; Passive equalizer design for signal integrity of high speed optical interconnect system

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题名:	改善高速光連接系統訊號完整性之被動等化器研製;Passive equalizer design for signal integrity of high speed optical interconnect system
作者:	張碩甫;Shou-fu Chang
贡献者:	電機工程研究所
关键词:	被動等化器;高速光連接系統;訊號完整性;垂直共振腔面射型雷射;誤碼率;BER;OC-192;10 GbE;signal integrity;VCSEL;high-speed optical interconnection system;passive equalizer
日期:	2011-08-29
上传时间:	2012-01-05 14:59:25 (UTC+8)
摘要:	本論文研究目標為研製一應用於高速光連接系統的被動等化器，利用電容、電感和電阻等被動元件來補償整體系統的頻率響應平坦度，可以有效提升訊號傳輸的訊號雜訊比及高速光連接系統的訊號完整性。本論文利用光通訊系統整體的S參數和理想訊號完整性所需要的小訊號頻寬，反推出目標被動等化器的頻率響應。在驗證實驗中，高速光連接系統輸出端使用德國ULM公司所生產的垂直共振腔面射型雷射晶片(ULM-850-5Gbps)，其標準操作電流為5 mA，傳輸速度可以達到5 Gbps。首先，將ULM-850電流操作在5.5 mA、訊號速度10 Gbps的實驗環境下，經過被動等化器改善後，傳輸速度可以由5 Gbps提升到10 Gbps，並可通過OC-192與10 GbE的遮罩規範；而傳輸速度固定在5 Gbps時，在符合10-12誤碼率之情況下，ULM-850的操作電流可由2.9 mA下降到2.35 mA。本論文提出的被動等化器設計，具有簡單明瞭的設計流程，電路架構簡單且易與光連接架構整合，應用起來有較多的自由度和設計彈性。預期在實務應用中可以節省直流功率損耗，降低整體製作成本。 The purpose of this research is to develop a passive equalizer that can be used in the high-speed optical interconnection system. This equalizer effectively increases the signal to noise ratio (SNR) of the signal transmission and also improves the signal integrity of the high-speed optical interconnection system by using capacitors, inductors, resistors to compensate for the overall system frequency response flatness. Based on the S parameters of the high-speed optical interconnection system and the band width of the small-signal in the ideal signal integrity, the frequency response of the target passive equalizer can be calculated. Experiments use the Vertical cavity surface-emitting laser (VCSEL) chips (ULM-850-5Gbps) from ULM in the output of high-speed optical interconnection system, the standard bias current is 5 mA and the transmission speed can reach 5 Gbps. After improving the passive equalizer, the transmission speed can increase from 5 Gbps to 10 Gbps and also pass the eye mask of OC-192 and 10 GbE. If the transmission speed is kept at 5 Gbps, the bias current of ULM-850 can be decreased from 2.9 mA down to 2.35 mA under the 10-12 bit error rate (BER). This passive equalizer is an intelligible design which is easy to understand; its circuit is simple and can easily be integrated with the high-speed optical interconnection system. All these features make it very flexible and applicable to other design. It is believed to save DC power consumption and lower costs in practical applications.
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