| 摘要: | 本論文主要在討論與發展採用注入鎖定技術的非線性單晶微波積體電路。首先，提出一個採用電抗補償技術的寬頻E類功率放大器，並實現於鉮化鎵0.5微米增強型/空乏型假晶高電子遷移率電晶體製程(0.5-m GaAs E/D-mode PHEMT)。由於利用電抗補償技術，提出E類功率放大器的頻寬可達87%。這是第一個使用電抗補償技術的全積體化E類功率放大器，而且與其他所發表的全積體化功率放大器相比，此電路達到最佳的優化指數及3 dB頻寬。為了更進一步降低驅動輸入功率，提出一個兩級寬頻且使用注入鎖定技術的E類功率放大器，並實現在鉮化鎵0.5微米增強型/空乏型假晶高電子遷移率電晶體製程上。使用注入鎖定的方法，功率放大器操作如同振盪器，且輸出訊號被鎖定至與輸入訊號相同的頻率，降低原先所需的輸入功率，以提高功率增益。另外，本篇論文採用自主電路(Autonomous circuit)來作非線性穩定度分析，並且開發一個系統化的注入鎖定E類功率放大器設計方法。在使用高斯最小頻移鍵(Gaussian minimum-shift keying, GMSK) 及64-正交振幅調變(Quadrature amplitude modulation, QAM)的輸入調變訊號下，仍具有高效率及良好的調變品質。此外，本文也提出一個使用有限感抗射頻扼流圈(Radio frequency chock, RFC)的2.5 GHz E類功率振盪器，並使用鉮化鎵0.5微米增強型/空乏型假晶高電子遷移率電晶體製程實現。E類負載網路引入有限射頻扼流圈感值的分析，並開發一個簡單且有系統的E類功率振盪器設計步驟。為了讓E類負載網路操作在最高頻率(fmax,E)之上，將電晶體操作於飽和區，因此近似E類運作出現在交叉電流(bifurcated current)。所以本論文也提出一個24-GHz的E類功率振盪器，並且使用鉮化鎵0.15微米假晶高電子遷移率電晶體製程實現。這兩個所提出的E類功率振盪器的量測結果與最近所發表的功率振盪器相互比較，展現高效率及高功率輸出等優點。利用環形自我注入方法，我們亦提出了一個八相位壓控振盪器結合八個反射式調變器在同一單晶片中。利用所提出的架構，反射式調變器可以當作一個振幅相位調變器，因此可以簡單且準確地量測出振幅與相位誤差。此技術還可以進一步使用在多相位壓控器振盪上。另外，提出一個使用自注入鎖定技術的正交壓控振盪器，並實現在0.18微米互補金屬氧化半導體製程上。使用此技術可達到低功率消耗與低的相位雜訊優點，與先前所發表的最佳正交壓控振盪器相比，此次所提出的自注入鎖定技術的正交壓控振盪器擁有最佳的優化指數及最低的相位雜訊。另外，為了更進一步將自注入鎖定技術應用在高頻，也成功使用90奈米互補金屬氧化半導體製程設計一個60 GHz自注入鎖定技術的正交壓控振盪器。從這些實驗可知，我們提出的自注入鎖定技術很適合在高性能的正交壓控振盪器及多相位壓控振盪器上。最後，使用65奈米金屬氧化半導體製程的雙閘極元件來設計與分析一個兩級低雜訊放大器與一個串接注入四相位壓控振盪器。另外，也提出一個產生正交訊號的機制，並應用於所提出四相位壓控振盪器設計。利用雙閘極元件，所提出的兩級低雜訊放大器與一個正交壓控振盪器皆達到良好的特性。從這些實驗可知，雙閘極元件是適合應用在電路設計上，如低雜訊放大器、正交壓控振盪器以及其他高於20 GHz的射頻電路上。最後，我們總結這篇博士論文，並說明未來可研究發展方向。Research on the nonlinear monolithic microwave integrated (MMIC) circuits using injection-locking technique is presented in this dissertation. A broadband class-E power amplifier (PA) using a reactance compensation technique is proposed using a 0.5-?m GaAs enhancement/depletion pseudomorphic high-electron mobility transistor (E/D-mode PHEMT) process in Chapter 2. By using the reactance compensation technique, the bandwidth of the proposed class-E PA can achieves 87%. This is the first fully integrated microwave class-E PA with the reactance compensation technique, and also this work demonstrates the highest figure-of-merit (FOM) with the 3-dB bandwidth among all the reported fully integrated PAs. To further mitigate the input driving power, a two-stage broadband injection-locking class-E PA using a 0.5-?m GaAs E/D-mode PHEMT process are also presented. The PA works as an oscillator whose output voltage is tuned at the input frequency. The proposed injection-locking PA achieves high power added efficiency (PAE) and high power gain. Besides, an autonomous circuit is also employed for nonlinear stability analysis, and the design procedure is summarized for the circuit implementation. Moreover, the proposed PA with Gaussian minimum-shift keying (GMSK) and 64-QAM modulation signals still demonstrates good performance, and it is suitable for the digital modulation schemes.A 2.5-GHz class-E power oscillator (POSC) using a finite dc-feed inductance is proposed using a 0.5-?m GaAs E/D-mode PHEMT process. The analysis of the class-E load network using finite dc-feed inductance is presented, and a systematic design procedure for the class-E POSC is developed. The class-E load network can be further operated above the class-E maximum frequency (fmax,E) as the core device is operated in the saturated region. Moreover, a 24-GHz class-E POSC using a 0.15-?m GaAs E/D-mode PHEMT process is present in Chapter 3. The measured results of the two proposed class-E POSCs compared with the recently reported state-of-the-art POSCs are also summarized in this dissertation.With a ring self-injection technique, an eight-phase voltage-controlled oscillator (VCO) with eight reflection-type modulators is presented in Chapter 4. The amplitude and phase errors can be easily and accurately evaluated using the proposed topology, because the reflection-type modulators can be performed as a switch or an amplitude-phase modulator. This technique will be further applied to the characterizations of other multi-phase VCOs. A self-injection-coupled quadrature voltage-controlled oscillator (SIC-QVCO) using a standard bulk 0.18-?m complementary metal-oxide-semiconductor (CMOS) process has been successfully demonstrated. The proposed QVCO using a modified SIC method has a few advantages of low dc consumption and low phase noise. As compared with the previously reported state-of-the-art QVCOs, this SIC-QVCO features the lowest FOMs and phase noise. Besides, to further test the potential of the SIC technique in millimeter-wave (MMW) band, a 60-GHz SIC-QVCO using a 90-nm CMOS process has also been successfully designed and implemented. From these demonstrations, we can see that the proposed SIC method is suitable for the circuit designs of high performance QVCOs and multi-phase VCOs. In Chapter 5, design and analysis of a two-stage cascade low noise amplifier (LNA) and bottom-series self-injection quadrature voltage-controlled oscillator (BS-QVCO) using a 65-nm CMOS dual-gate device are presented. A small-signal equivalent circuit of the dual-gate device is investigated for bandwidth. Besides, a mechanism of the quadrature signal generation using the dual-gate device is presented for the proposed QVCO design. By using the dual-gate device, the two-stage cascade LNA achieves wide 3-dB bandwidth with high gian and low noise figure, and the BS-QVCO also demonstrates good phase noise and good quadrature accuracy. The dual-gate CMOS device is suitable for the circuit design of high performance LNAs, QVCO, and other RF circuits above 20 GHz, especially for MMW applications. Finally, we summarize the concolusion and the future works in Chapter 6. |
