隨著電子元件操作功率、運算速度和積體電路密度不斷提升，元件操作時所帶來的高溫將反噬電子元件的操作效能，且元件損壞之機率將以指數方式增加。由於一般積體電路運作時並非整體皆會產生高熱，通常只有局部電路會有過熱的現象，亦即一般所謂的熱點（Hot spot）。以現今之半導體產業來說，如果要將熱電致冷器整合於積體電路中以達到熱管理之功用，唯有使用矽基材料才可相容。本實驗室先前已完成矽鍺柱薄膜熱導率與電導率相關研究，其中矽鍺合金24%之奈米柱薄膜經由估算，其400K 時的ZT達約0.31。因此，本研究使用矽鍺合金奈米柱陣列作為熱電致冷元件之核心材料。 將矽鍺薄膜透過微影佐以蝕刻製程製作出邊長尺寸均為300 nm 且高度達1 μm之矽鍺柱陣列，再分別重摻雜為N 型（1×1020 cm-3）與P 型（2×1019 cm-3）。巧妙地藉由金屬矽化製程與掀離製程（lift-off）將金屬NiSi 作為N 型與P 型矽鍺柱之間的連結，成功地完成矽鍺熱電致冷元件。本研究所製作矽鍺陣列尺寸分別為18×25 μm2與36×28 μm2的元件中。尺寸為18×25 μm2 之熱電致冷元件在環境溫度30℃時，僅需供給28 mA 即能達到3.7℃之致冷峰值；尺寸為36×28 μm2 於環境溫度60 oC 之致冷溫度曲線，於通入電流68 mA 時，最高致冷溫度峰值為4.5℃。總觀上述實驗結果，透過高摻雜濃度、結構尺寸、材料之間介陎所增強的邊界散射、合金散射以及聲子-聲子散射機制有效地保持電傳導率，降低熱導率，進而提升矽鍺奈米柱陣列之熱電轉換效率，使通以小電流的矽鍺熱電致冷元件在30℃和60℃的環境溫度時就有相當程度的冷卻溫度。 With the rapid miniaturization of electric devices to boost the switching speed and to increase the number of components per integrated circuit (IC) chip, performance and reliability of devices are severely threatened by localized hot spots where the temperature is much higher than the surrounding environmental regions. Si-based thermoelectric (TE) microcooler has being expected to offer an efficient method for thermal management of Si IC, since it can provide in situ local cooling for specific hot spots. Si-Ge materials are highly scalable and appropriate for chip-level cooling due to the ease of integration with the prevailing CMOS ICs and more importantly, a reasonable TE figure of merit, ZT. In thisthesis, we demonstrated a novel fabrication of Si0.76Ge0.24 nanopillar TE cooler. Combinational electronic-beam lithography and plasma etching technologies were performed to produce 300-nm-diameter, 1000-nm-height poly-SiGe pillars, followed by ion implantation of either boron or phosphorus. The doping concentrations are 1×1020 cm-3(P) and 2×1019 cm-3(B) for n-type and p-type nanopillars. Metal interconnects between n- and p-type nanopillars were realized by the Ni silicidation and the Al contact electrodes were formed using lift-off processes. The cooling temperature was measured using the four-point-probe technique at 303K and 333K, respectively. The maximum cooling temperatures of 3.7K(measured at 303K) and 4.5K(measured at 333K) were measured on the SiGe pillar cooler of 36×28 μm2. The reasonable good cooling performance of SiGe TE microcooler possibly results from the good electrical conductivity of heavily doped p-n SiGe pillar array and the significantly reduced thermal conductivity of SiGe nanopillar as a consequence of alloy, boundary and phonon-phonon scattering.
