於目前積體電路製造之先進製程(90nm以下)中，對於元件設計的要求及限制愈趨於嚴格，故設計者於電路設計階段需要更多軟體(EDA TOOL)的輔助，以達該製程之特性。因此晶圓代工廠為幫助客戶於產品開發流程更加順暢，因此開發了製程設計套件(Process Design Kit, PDK)。 在過去學長的論文中，只有呈現電阻串連式連續參考值產生器的實體佈局，並未檢測此產生器是否完全符合製程設計套件(PDK)，因此本論文要驗證電阻串連式連續參考值產生器是可以使用製程設計套件(PDK)來完成，以確保此電路進入先進製程後，也可以使用各個先進製程的製程設計套件(PDK)來產生。 ;Nowadays, the integrated circuit fabrication in advanced process (under 90nm), analog component design is demanding increasingly and more the restrictions. So in the circuit design stage, designers rely on the auxiliary of software(EDA TOOL), in order to achieve the realization of the manufacturing process. Therefore foundries develop a Process Design Kit(PDK) to help customers in the product development smoothly. In this thesis, by using a resistor-string successive reference generator as a circuit example, it aims to develop the corresponding PDk. We verify the physical layout of this reference generator by ERC, DRC, LVS and PEX checking and develop the Physical Verification Deck. Hence, this generator have been qualified in full compliance with Process Design Kit(PDK). It ensures this circuit generator that can be used in the advanced manufacturing process.
