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    請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/75282


    題名: 二維電子氣體中量子點接觸 與量子點製作及量測;Quantum point contact and quantum dot fabrication and measurement in two-dimensional electron gas
    作者: 黃彥豪;Huang, Yen-Hao
    貢獻者: 物理學系
    關鍵詞: 二維電子氣體;量子點接觸;雙量子點;超導共面波導共振腔;電路量子電動力學系統;二硫化鉬;電導量子化;two dimensional electron gas;quantum point contact;double quantum dot;superconducting coplanar waveguide resonator;circuit quantum electrodynamics system;MoS2;conductance quantization
    日期: 2017-11-20
    上傳時間: 2018-01-16 10:43:57 (UTC+8)
    出版者: 國立中央大學
    摘要: 本論文利用「砷化鎵/鋁砷化鎵異質接面」與「單層二硫化鉬」建構出兩種二維電子氣體。我們嘗試在砷化鎵/鋁砷化鎵異質接面製作出雙量子點(double quantum dot)結構,量測並探討雙量子點形成的二能階系統與共面波導共振腔是否發生耦合現象,此課題與電路量子電動力學相關,目前進度仍停留在元件製程階段,共振腔與雙量子點系統已經分別完成,尚待對位校正與光阻舉離失敗的問題解決後,才能完成元件並進行量測。
    另一方面,我們利用一對頂部閘極在單層二硫化鉬的二維電子氣體上製作量子點接觸(quantum point contact)元件,兩根頂部閘極的頂點間距為量子點接觸元件的通道寬度,線寬則為量子點接觸元件的通道長度。為了讓頂部閘極在-10V以內有效驅趕頂部閘極附近二維電子氣體中的電子,我們將頂部閘極的間距設計在100nm以下。電子束微影製作出的頂部閘極線寬最窄約60nm,我們利用高分子電解質閘極提升材料表面的載子濃度,讓電子的平均自由路徑能超過60nm。元件透過大電流退火,成功將接面電阻值降低,讓量測中的背景電阻變小。為了降低熱擾動對元件的影響,量測環境溫度為50mK,並藉由定電流量測,觀察到類似電導量子化的現象。
    ;In this study, we used GaAs/AlGaAs heterostructure and monolayer MoS2 to construct two dimensional electron gas. We tried to fabricate double quantum dot structure on GaAs/AlGaAs heterostructure and measure the coplanar waveguide resonator coupling the two level system which consist of double quantum dot or not. This topic is related to circuit quantum electrodynamics. The recently progress is still in fabrication. Resonator and double quantum dot system completed separately. We must solve alignment fail and lift-off fail before measuring.
    On the other hand, we used a pair of the top-gate to fabricated quantum point contact device on monolayer MoS2 two dimensional electron gas. Top-gate vertex spacing is the width of the quantum point contact device channel. Top-gate line-width is the length of the quantum point contact device channel. In order to drive electrons out of the two dimensional electron gas near the top-gate range at -10V, we design the top-gate spacing below 100 nm. The electron beam lithography made the width of the top-gate line as narrow is about 60 nm, we used solid polymer electrolyte gate upgrade the carrier density on MoS2 surface so that the mean free path of electrons in the system can exceed 60 nm. We used current annealing to reduce the contact resistance in device, making smaller resistance in measurement. In order to reduce the thermal fluctuation, the measurement temperature was 50mK. We observed similar conductance quantization by constant current measurement.
    顯示於類別:[物理研究所] 博碩士論文

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