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    jsp.display-item.identifier=請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/80955


    题名: 以軟體定義無線電實現DVB-T基頻解調解碼接收機;Implementation of DVB-T Baseband Demodulation and Decoder Receiver with a SDR Platform
    作者: 林晉琨;Lin, Chin-Kun
    贡献者: 通訊工程學系
    关键词: 數位電視地面廣播;解調;OFDM
    日期: 2019-05-06
    上传时间: 2019-09-03 15:21:38 (UTC+8)
    出版者: 國立中央大學
    摘要: 實驗室以務實軟體定義無線電(Software-defined Radio,SDR)來實現DVB-T接收機,結合FPGA(XC7A200T)及射頻模組(AD9361)完成軟體定義無線電平台,本論文設計基頻電路來進行DVB-T訊號解調,基頻接收機需要的模組包括降頻取樣、時間同步、頻率同步、快速傅立葉轉換、通道估測等化、符元解交錯器、軟式決策、位元解交錯器、迴旋碼解碼、外部解交錯器、里德所羅門碼解碼、解亂碼器,將解調解碼得到之MPEG-2傳輸封包資料流用VLC多媒體播放器播出。
    先實錄訊號以Matlab進行解調,再使用硬體描述語言設計基頻電路,用iSim模擬電路時序後,再以軟體定義無線電平台實錄訊號驗證其硬體功能,經過解調解碼後,便能夠得到MPEG-2(Moving Picture Experts Group, MPEG) Transport Stream,將之播放以驗證接收機之成果。
    ;Our laboratory use Realistic Software-defined Radio platform to implement Digital Video Broadcasting Terrestrial(DVB-T) receiver. We combine FPGA and Radio Frequency module(AD9361) to finish SDR platform. In this thesis, we design baseband receiver for demodulation and Decoder DVB-T signal. This baseband receiver needs the digital signal processing units which are down sampling, time synchronizer, frequency synchronizer, Fast Fourier Transform processor, channel estimator, channel equalizer, symbol de-interleaver, soft decision, bit de-interleaver, Viterbi decoder, packet synchronizer, outer de-interleaver, Reed Solomon decoder, de-scrambler. The signal which is under demodulation and decoder is MPEG-2 Transport Stream, and we can play the video via VLC player.
    First, we record DVB-T signal on Matlab and demodulate the signal. Furthermore, we design baseband digital signal processing units by using Verilog hardware description language and verify with iSim. Then, the real-time hardware is implemented and verified with SDR platform. After it is under demodulation and decoder, we are able to get MPEG-2 Transport Stream. We could play this Transport Stream to verify baseband receiver’s result.
    显示于类别:[通訊工程研究所] 博碩士論文

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