微型化垂直發光電晶體之面板研究;Research of Miniaturized Vertical Light-Emitting Transistor Panel

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题名:	微型化垂直發光電晶體之面板研究;Research of Miniaturized Vertical Light-Emitting Transistor Panel
作者:	吳宇霈;Wu, Yu-Pei
贡献者:	光電科學與工程學系
关键词:	垂直發光電晶體;微型化面板;有機發光二極體
日期:	2021-03-30
上传时间:	2021-12-07 11:39:46 (UTC+8)
出版者:	國立中央大學
摘要:	本論文主要研究微型化無機/有機複合式垂直發光電晶體以及在矩陣式顯示面板之應用。無機/有機複合式垂直發光電晶體的基本架構為由下至上堆疊氧化鋅電晶體以及有機發光二極體。其中氧化鋅電晶體為下閘極/上接觸結構，以透明導電膜ITO為閘極，並以原子層沉積(atomic layer deposition, ALD)製作三氧化二鋁和氧化鉿雙層介電層以及N型氧化鋅作為半導體層，再透過光學微影技術製作包覆氧化矽絕緣層之銀源極作為垂直發光電晶體之電子注入端。有機發光二極體則以高分子發光材料Super Yellow旋轉塗佈於氧化鋅電晶體之上，再蒸鍍上汲極作為電洞注入端。整體而言，氧化鋅電晶體具備低驅動電壓、低接觸電阻、和高電子遷移率(11-12 cm2/Vs)，並可利用光學微影製程縮小ZnO面積至微米尺寸，可注入高密度和長距離橫向擴散之電子流再向上驅動有機發光二極體，實現高量子效率、均勻面出光、和高開口率之微型發光電晶體，而透過包覆源極之絕緣層可有效抑制關電流密度以提高電流與亮度之開/關比約達104。本論文將利用微型發光電晶體製作一4x4矩陣式顯示面板，在優化製程條件下，成功以Ardiuno IDE程式控制顯示面板之影像，未來可望進一步應用於高解析度之面板開發。 ;This thesis mainly conducts research on the miniaturized inorganic/organic vertical light-emitting transistor (VLET) and its application of matrix display panel. The inorganic/organic VLET is a bottom-up integration of a ZnO transistor and an OLED. The ZnO transistor is based on a bottom-gate/top-contact configuration, consisting of transparent conductor ITO as the bottom gate, Al2O3/HfO2 bilayer-dielectric and N-type ZnO semiconductor fabricated using atomic layer deposition (ALD), and photolithographically patterned SiOx-encapsulated Ag as the source for electron injection in the VLET. The OLED was then spin-coated on the ZnO transistor with a light-emitting polymer, Super yellow, followed by deposition of top drain for hole injection. Overall, the bottom ZnO transistor has a low-drive voltage, low contact resistance and high electron mobility (11-12 cm2/Vs), and the ZnO area can be miniaturized to micron scale with photolithography. It can inject high density and long-range lateral distribution of electron current flow to drive the top OLED, achieving a miniaturized VLET with a high quantum efficiency, uniform areal emission, and a large aperture ratio. The source encapsulated with SiOx insulator can efficiently suppress the off-current density and enhance the on-off ratios of current and luminance to 104. The miniaturized VLET is applied to develop a 4x4 matrix display panel. By optimizing the process condition and using Ardiuno IDE code, the display image is successfully controlled. This VLET is expected to be further applied to develop high-resolution panels in the future.
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