基於RFSoC平台的LEO衛星通 訊時變通道模擬器的設計與實現;Design and Implementation of Time-Varying Channel Emulator for LEO Satellite Communications with RFSoC Platform

NCUIR > College of Electrical Engineering & Computer Science > Graduate Institute of Communication Engineering > Electronic Thesis & Dissertation > Item 987654321/90822

Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/90822

Title:	基於RFSoC平台的LEO衛星通訊時變通道模擬器的設計與實現;Design and Implementation of Time-Varying Channel Emulator for LEO Satellite Communications with RFSoC Platform
Authors:	徐溥謙;Hsu, Pu-Chien
Contributors:	通訊工程學系
Keywords:	軟體定義無線電;RFSoC;LEO;Farrow Interpolator;Cordic;Time-Varing Channel
Date:	2023-04-20
Issue Date:	2023-05-09 18:07:06 (UTC+8)
Publisher:	國立中央大學
Abstract:	近年來，隨著衛星小型化及有效載荷系統不斷進步，以及低軌火箭運載成本的降低，使得衛星通訊除了軍事用途外，也開始快速朝向商業化發展。衛星通訊擁有極高的覆蓋性、高資料傳輸率，以及傳輸較不易受天然災害影響，這些優勢讓低軌道衛星擁有了很好的商業價值。為了確保在未來地面接收站能接收衛星發射回來的訊號，我們做了一個低軌道衛星的通道模擬器，在衛星還沒上太空前先模擬太空中會產生的訊號延遲、頻率偏移及大氣環境的訊號衰減，未來地面站才能更加穩定收到我們的衛星訊號。本論文在ZCU111之FPGA硬體架構設計與實現低軌道衛星的通道模擬，在FPGA上產生單載波訊號經過DAC/ADC收回來後，依照低軌道衛星的規格做時變延遲、相位變化以及訊號增益達到模擬衛星之訊號。本篇論文之硬體架構包含BlockRAM模組、Farrow Interpolator模組、相位旋轉模組、訊號增益模組以及RF Data Converter來實現低軌道衛星經過通道後的收發。 ;In recent years, with the continuous improvement of satellite miniaturization and payload system, as well as the reduction of the cost of low-orbit rockets, satellite communications have begun to rapidly develop towards commercialization in addition to military applications. Satellites have extremely high coverage, high data transmission rates, and transmissions are less susceptible to natural disasters. These advantages make low-orbit satellites have good commercial value. In order to ensure that the ground receiving station can receive the signal transmitted by the satellite in the future, we have made a low-orbit satellite channel simulator. Before the satellite goes into space, simulate the signal delay, frequency offset and signal attenuation of the atmospheric environment in space, so that the ground station can receive our satellite signal more stably in the future. This thesis designs and realizes the channel simulation of low-orbit satellites on the FPGA hardware architecture of ZCU111. After the single-carrier signal is generated on the FPGA and retrieved by DAC/ADC, time-varying delay, phase change and signal gain are performed according to the specifications of low-orbit satellites. Reaching the signal of analog satellite. The hardware architecture of this paper includes BlockRAM module, Farrow Interpolator module, phase rotation module, signal gain module and RF Data Converter to realize the effect produced by low-orbit satellites.
Appears in Collections:	[Graduate Institute of Communication Engineering] Electronic Thesis & Dissertation

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