為研製具蕭特基源/汲極接觸的反堆疊型非晶質矽化鍺薄膜電晶體。在第一階段中，我們成左漣Q用一層很薄的銻金屬改善鋁或鈀和非晶質矽化鍺接面的接觸電阻。由實驗中發現，加入一層薄的銻金屬，可以增加界面導電的穩定性。再經過適當的退火處理後，更可降低接觸電阻達十五萬倍之多(6.23 x 102 Ω-cm2 (Al/Pd/i-a-SiGe:H)降低至4 x 10-3Ω-cm2 (Al/Pd/Sb//i-a-SiGe:H))。 我們也順利地製作出利用鋁/銻雙層金屬作為源/汲極的蕭特基接觸非晶質矽化鍺薄膜電晶體(a-SiGe:H TFT)。實驗結果顯示，當通道層加入越多鍺元素，電晶體的臨界電壓下降及飽和電流提昇。而且，適當的熱退火處理可以改善薄膜電晶體的特性。一般而言，最佳的熱退火處理溫度與時間隨著通道鍺含量的增加而下降與縮短。 最後我們也比較i-, n+- 及grading i-a-Si0.89Ge0.11:H薄膜電晶體的性能，發現grading i- a-Si0.89Ge0.11:H薄膜電晶體在導通飽和電流與臨界電壓等方面具有較好的特性。 We had fabricated the Schottky source/drain (S/D) inverted-staggered a-SiGe:H TFT successfully. The contact resistance of Al or Pd and a-SiGe:H interface was improved by employing a very thin Sb layer for better ohmic contact. It was observed that using a very thin Sb layer before the Al or Pd metal deposition could enhance the stability of the current transport in the metal/semiconductor (i-a-SiGe:H) interface, also, after an appropriate low-temperature annealing process the specific contact resistance could be significantly reduced 1.5x105 times (from 6.23x102Ω-cm2 (Al/Pd/i-a-SiGe:H) to 4x10-3Ω-cm2 (Al/Pd/Sb/i-a-SiGe:H)). The Schottky inverted-staggered a-Si1-xGex:H S/D TFTs (with Al/Sb dual metal films) have been fabricated successfully. The experimental results indicated that threshold voltage of TFT decreased and its saturation current increased with the increasing Ge content of a-Si1-xGex:H channel layer. Also it was observed that an optimal annealing process could be employed to improve the device performance, and generally, the optimal annealing temperature and duration decreased with the Ge content of a-Si1-xGex:H layer channel layer. Finally, the performances of Schottky S/D i-, n+-, and graded i- a-Si0.89Ge0.11:H TFTs were compared, and it was found that the graded i-a-Si0.89Ge0.11:H one had the best characteristics of ON drain saturation current and threshold voltage.
