低軌道通訊的技術蓬勃發展下，數位衛星廣播系統成不可或缺的關鍵。衛星在高 速移動的情況下與地面站所產生之都普勒頻率偏移成為重要的課題，也因應高通量資料 率串流的通訊技術，DVB-S2 相較於前一代有更好的傳輸量，支援 8PSK、16APSK、 32APSK，使得在不同訊雜比(SNR)下能選擇更有效益的調變與碼率。 本論文針對 DVB-S2 接收端之載波頻率同步與訊框同步的硬體架構設計與實現， 探討其性能。載波頻率同步使用差分頻率估測器(Differential Frequency Estimator)、導向 決策器(Decision-Directed)與迴路濾波器(Loop Filter)計算與修正頻率偏移，訊框同步包 含 MODCOD 偵測器(MODCOD Detector)、抓取訊號及相位修正、訊框彈性器(Frame Elasticizer)與實體層解攪亂器(PL Descrambler)。 ;With the flourishing development of Low Earth Orbit (LEO) communications technology, digital video broadcasting systems for satellite (DVB-S) have become indispensable. The Doppler effect generated when satellites are in rapid motion relative to ground stations has become a crucial issue. In response to high-throughput data rate streaming communication technology, DVB-S2 offers improved throughput compared to the previous generation. It supports 8PSK, 16APSK, and 32APSK, allowing for the selection of more efficient modulation and coding schemes under different signal-to-noise ratios (SNR). In this thesis, it focuses on the hardware architecture design and implementation of carrier frequency synchronization and frame synchronization for DVB-S2 receivers, along with a performance evaluation. Carrier frequency synchronization includes a Differential Frequency Estimator, Decision-Directed Phase Estimator, and Loop Filter to compute and correct frequency offsets. Frame synchronization includes MODCOD Detector, signal catcher and phase correction, Frame Elasticizer, and Physical Layer Descrambler.
