傳統在做電路模擬分析時，往往將元件參數彼此間的變動視為獨立而不相關，但是電路在晶圓廠製造過程中，電晶體彼此間的參數變動會有某種程度的關聯性；故本論文主要是建立一個：引入元件參數彼此間有空間相關性的模擬方式，來分析雙級運算放大器效能的表現，並藉由此方法來找尋類比電路在佈局時電晶體最佳的擺放位置。 We used to treat the parameter between devices as independent in traditional circuit simulation. However, the parameter variation in each transistor should have certain correlation during manufacturing process. This thesis presents a methodology to simulate a two-stage OP-Amplifier with spatial correlation in each transistor parameter. Based on this method, the best transistor permutation in this analog circuit is found.
